Code-Phase Clock Bias and Frequency Offset in PPP Clock Solutions

摘要

Precise point positioning (PPP) is a zero-difference single-station technique that has proved to be very effective for time and frequency transfer, enabling the comparison of atomic clocks with a precision of a hundred picoseconds and a one-day stability below the $1e-15$ level. It was, however, noted that for some receivers, a frequency difference is observed between the clock solution based on the code measurements and the clock solution based on the carrier-phase measurements. These observations reveal some inconsistency either between the code and carrier phases measured by the receiver or between the data analysis strategy of codes and carrier phases. One explanation for this discrepancy is the time offset that can exist for some receivers between the code and the carrier-phase latching. This paper explains how a code-phase bias in the receiver hardware can induce a frequency difference between the code and the carrier-phase clock solutions. The impact on PPP is then quantified. Finally, the possibility to determine this code-phase bias in the PPP modeling is investigated, and the first results are shown to be inappropriate due to the high level of code noise.