Effects of barrier layers on device performance of high mobility In_(0.7)Ga_(0.3)As metal-oxide-semiconductor field-effect-transistors

摘要

We have applied single InP barrier layer with different thicknesses and InP/In_(0.52)Al_(0.48)As double-barrier layer to In_(0.7)Ga_(0.3)As Al_2O_3 metal-oxide-semiconductor field-effect-transistors (MOSFETs) and investigated their effects on device performance. In_(0.7)Ga_(0.3)As MOSFETs with 3 nm InP single-barrier attain 22% higher peak effective mobility while devices with 5 nm InP attain 58% higher peak mobility than the ones without barrier. Devices using InP/In_(0.52)Al_(0.48)As double-barrier achieve mobility enhancement at both low-field (68% at peak mobility) and high-field (55%) compared to ones without barrier. High channel mobility of 4729 cm~2/V s has been obtained using InP/In_(0.52)Al_(0.48)As barrier and atomic-layer-deposited Al_2O_3 gate oxide.