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FPGA Accelerated Phased Array Design Using the Ant Colony Optimization

机译:利用蚁群优化的FPGA加速相控阵设计

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The objective of this paper is to investigate the utilization of field programmable gate arrays (FPGA) in the field of electromagnetics by applying the ant colony optimization (ACO) method in the design of phased array antennas for multiple beam satellite communication systems. The amplitudes of the array elements are optimized to reduce the co-channel interference in a multiple beam satellite communication system. The potential gains in the speed of the calculations are investigated in comparison to conventional simulation techniques of the same application on a regular PC. Two different FPGA platforms and implementation approaches are compared for performance to two software developments implemented using Matlab and C languages. It has been shown that significantly accelerated performance can be achieved for the particular application. This kind of speed improvement can enable handling more complex requirements and constraints for the same application in a very reasonable amount of time, which would otherwise be impossible with conventional computational platforms and techniques. This magnitude of speedrnimprovement is due to the configurable nature of the FPGAs. Unlike central processing units (CPU) in a conventional computer, which have to deal with a preset set of instructions to properly function; FPGAs are completely programmable to carry out a set of functions in the most efficient manner for the particular algorithm at hand. In this study, the FPGA has been configured to function as an efficient "ACO machine." Both parallelization and pipelining have been utilized to achieve this performance. The details of the implementation on the FPGA platform and the achieved acceleration are discussed in the paper.
机译:本文的目的是通过在多波束卫星通信系统的相控阵天线设计中应用蚁群优化(ACO)方法来研究现场可编程门阵列(FPGA)在电磁学领域的利用。优化阵列元件的幅度以减少多波束卫星通信系统中的同频道干扰。与普通PC上相同应用程序的常规仿真技术相比,研究了计算速度的潜在收益。将两种不同的FPGA平台和实现方法的性能与使用Matlab和C语言实现的两种软件开发进行了比较。已经表明,对于特定应用可以实现显着加速的性能。这种速度改进可以使您能够在非常合理的时间内处理同一应用程序的更复杂的要求和约束,否则传统的计算平台和技术将无法实现。这种速度提升的幅度是由于FPGA的可配置特性所致。与传统计算机中的中央处理单元(CPU)不同,中央处理单元必须处理一组预设的指令才能正常运行; FPGA完全可编程,可以针对手头的特定算法以最有效的方式执行一组功能。在本研究中,FPGA已配置为充当高效的“ ACO机器”。并行化和流水线都已被用来实现这一性能。本文讨论了在FPGA平台上实现的细节以及所实现的加速。

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