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FPGA-Based On-Board Geometric Calibration for Linear CCD Array Sensors

机译:基于FPGA的板载几何校准用于线性CCD阵列传感器

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摘要

With increasing demands in real-time or near real-time remotely sensed imagery applications in such as military deployments, quick response to terrorist attacks and disaster rescue, the on-board geometric calibration problem has attracted the attention of many scientists in recent years. This paper presents an on-board geometric calibration method for linear CCD sensor arrays using FPGA chips. The proposed method mainly consists of four modules—Input Data, Coefficient Calculation, Adjustment Computation and Comparison—in which the parallel computations for building the observation equations and least squares adjustment, are implemented using FPGA chips, for which a decomposed matrix inversion method is presented. A Xilinx Virtex-7 FPGA VC707 chip is selected and the MOMS-2P data used for inflight geometric calibration from DLR (Köln, Germany), are employed for validation and analysis. The experimental results demonstrated that: (1) When the widths of floating-point data from 44-bit to 64-bit are adopted, the FPGA resources, including the utilizations of FF, LUT, memory LUT, I/O and DSP48, are consumed at a fast increasing rate; thus, a 50-bit data width is recommended for FPGA-based geometric calibration. (2) Increasing number of ground control points (GCPs) does not significantly consume the FPGA resources, six GCPs is therefore recommended for geometric calibration. (3) The FPGA-based geometric calibration can reach approximately 24 times faster speed than the PC-based one does. (4) The accuracy from the proposed FPGA-based method is almost similar to the one from the inflight calibration if the calibration model and GCPs number are the same.
机译:随着诸如军事部署,对恐怖袭击和灾难救援的快速响应等对实时或近实时遥感影像应用的需求不断增长,机载几何校准问题近年来引起了许多科学家的关注。本文提出了一种使用FPGA芯片的线性CCD传感器阵列的机载几何校准方法。所提出的方法主要由输入数据,系数计算,平差计算和比较四个模块组成,其中使用FPGA芯片实现建立观测方程和最小二乘平差的并行计算,并提出了分解矩阵求逆方法。 。选择了Xilinx Virtex-7 FPGA VC707芯片,并使用了来自DLR(德国科隆)的机上几何校准所用的MOMS-2P数据进行验证和分析。实验结果表明:(1)采用浮点数据宽度从44位到64位时,FPGA资源包括FF,LUT,存储器LUT,I / O和DSP48的利用率为:以快速增长的速度消费;因此,对于基于FPGA的几何校准,建议使用50位数据宽度。 (2)地面控制点(GCP)数量的增加不会显着消耗FPGA资源,因此建议使用六个GCP进行几何校准。 (3)基于FPGA的几何校准的速度大约是基于PC的几何校准的24倍。 (4)如果校准模型和GCP数量相同,则基于FPGA的方法所提出的精度几乎与飞行中的精度相似。

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