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Extending the IEEE 802.15.4 Security Suite with a Compact Implementation of the NIST P-192/B-163 Elliptic Curves

机译:使用NIST P-192 / B-163椭圆曲线的紧凑实现扩展IEEE 802.15.4安全套件

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摘要

Typically, commercial sensor nodes are equipped with MCUsclocked at a low-frequency (i.e., within the 4–12 MHz range). Consequently, executing cryptographic algorithms in those MCUs generally requires a huge amount of time. In this respect, the required energy consumption can be higher than using a separate accelerator based on a Field-programmable Gate Array (FPGA) that is switched on when needed. In this manuscript, we present the design of a cryptographic accelerator suitable for an FPGA-based sensor node and compliant with the IEEE802.15.4 standard. All the embedded resources of the target platform (Xilinx Artix-7) have been maximized in order to provide a cost-effective solution. Moreover, we have added key negotiation capabilities to the IEEE 802.15.4 security suite based on Elliptic Curve Cryptography (ECC;. Our results suggest that tailored accelerators based on FPGA can behave better in terms of energy than contemporary software solutions for motes, such as the TinyECC and NanoECC libraries. In this regard, a point multiplication (PM) can be performed between 8.58- and 15.4-times faster, 3.40- to 23.59-times faster (Elliptic Curve Diffie-Hellman, ECDH) and between 5.45- and 34.26-times faster (Elliptic Curve Integrated Encryption Scheme, ECIES). Moreover, the energy consumption was also improved with a factor of 8.96 (PM).
机译:通常,商用传感器节点配备以低频时钟(即4-12 MHz范围内)计时的MCU。因此,在那些MCU中执行加密算法通常需要大量时间。在这方面,所需的能耗可能比使用基于现场可编程门阵列(FPGA)的单独加速器要高,后者在需要时会打开。在本手稿中,我们介绍了一种加密加速器的设计,该加速器适用于基于FPGA的传感器节点并符合IEEE802.15.4标准。目标平台(Xilinx Artix-7)的所有嵌入式资源均已最大化,以提供一种经济高效的解决方案。此外,我们在基于椭圆曲线密码学(ECC)的IEEE 802.15.4安全套件中增加了关键协商功能。我们的结果表明,基于FPGA的定制加速器在能量方面的性能优于现代的Mote软件解决方案,例如就这一点而言,点乘法(PM)的执行速度可以快8.58到15.4倍,快3.40到23.59倍(椭圆曲线Diffie-Hellman,ECDH),以及5.45到34.26之间。速度提高了2倍(椭圆曲线集成加密方案,ECIES),并且能耗也降低了8.96(PM)。

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