基于FPGA的智能化波形发生板卡设计

摘要

Signal source is an important part of test system. It is the key point of getting the feedback on the performance parameters of the tested components. A FPGA-based signal generator board is presented, which use Verilog HDL to achieve the internal logic circuit design and DDS to achieve the wave frequencies. The transmission bus selects BLVDS. The FPGA accomplishes receiving and sending data on the BLVDS bus, and also fulfilling the data cache. PC instruction and feedback data in accordance with Modbus protocol for transmission, C8051F120 completes reading the data of the FPGA internal BLVDS receiver buffer, calculates the signal waveform data according to PC users needed, and then writes feedback packet into the FPGA data cache, also starts BLVDS drive circuit for data delivery. The results show that the communication is highspeed, stable and reliable, the waveform is smooth, and the error of amplitude and frequency is small.%测试系统中的信号源是系统的一个重要环节,是准确反馈被测部件各项性能参数的关键.提出了一种基于FPGA的波形发生板卡,采用Verilog HDL实现FPGA内部逻辑电路设计,采用DDS算法实现波形频率.总线选择BLVDS,FPGA完成BLVDS总线上数据的接收、发送,以及数据的缓存,上位机指令和板卡反馈数据依照Modl3US协议进行传输,C8051F120完成对FPGA内部BLVDS接收电路缓存数据的读取,根据上位机指令计算生成用户所需信号波形的相关数据,然后将反馈的数据包写入FPGA数据缓存区,并启动BLVDS驱动电路完成数据的发送.实验结果表明:通信速度快、稳定、可靠,生成的波形平滑,幅值、频率误差小.