首页> 中文期刊> 《计算机工程与设计》 >基于FPGA的MAX192控制器仿真设计与研究

基于FPGA的MAX192控制器仿真设计与研究

         

摘要

为减轻微处理器频繁控制A/D转换器转换时序与读取A/D转换结果的负担,提出串行 A/D转换器 M AX192的FPGA控制方法。根据M AX192多通道转换时序的特点,设计基于FPGA的多通道转换控制器和 A/D转换结果寄存器阵列。由微控制器指定采样周期、采样点数、采样通道顺序和最大转换通道数等参数来控制 FPGA ,对M AX192进行转换,且每个采样通道配置1个结果寄存器组,其数量由最大采样通道数决定。仿真结果表明,基于FPGA的M AX192控制器对多通道信号连续转换时,每个通道的平均转换时间与单通道单独转换相比减少了37.5%;结果寄存器可及时存储每次转换结果,便于微处理器及时读取A/D转换结果进行后续快速数字信号处理运算,提高了数据采集系统的实时性,具有工程应用价值。%To reduce the burden of the microprocessor on frequently controlling the A/D converter’s conversion timing and rea-ding A/D conversion results ,the MAX192 controller design method based on the FPGA was proposed .According to the charac-teristics of the MAX192 multi-channel conversion timing ,the multi-channel switch controller and the array of A/D conversion results registers were designed .The sampling period ,sampling points ,the sampling channel order and the maximum conversion parameters were designated by the microcontroller .A result set of registers was configured to each sampling channel ,and the number was decided by the maximum sampling channel number .The simulation result shows that the average conversion time of each channel is decreased by 37.5% compared with that of the single channel conversion when multi-channel sequential conver-sions are controlled by the MAX192 controller based on the FPGA sample .Results registers can store the converted results in time to facilitate the microprocessor to timely read the A/D conversion results for subsequent fast digital signal processing opera-tions .T he timeliness of the data acquisition system is improved .It has engineering application value .

著录项

相似文献

  • 中文文献
  • 外文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号