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Efficient Interpolant Generation in Satisfiability Modulo Theories

机译:满意模理论中的有效插值生成

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The problem of computing Craig Interpolants for propositional (SAT) formulas has recently received a lot of interest, mainly for its applications in formal verification. However, propositional logic is often not expressive enough for representing many interesting verification problems, which can be more naturally addressed in the framework of Satisfiability Modulo Theories, SMT. Although some works have addressed the topic of generating interpolants in SMT, the techniques and tools that are currently available have some limitations, and their performace still does not exploit the full power of current state-of-the-art SMT solvers. In this paper we try to close this gap. We present several techniques for interpolant generation in SMT which overcome the limitations of the current generators mentioned above, and which take full advantage of state-of-the-art SMT technology. These novel techniques can lead to substantial performance improvements wrt. the currently available tools. We support our claims with an extensive experimental evaluation of our implementation of the proposed techniques in the MathSAT SMT solver.
机译:最近,针对命题(SAT)公式计算Craig插值的问题引起了广泛的关注,主要是因为其在形式验证中的应用。但是,命题逻辑通常不足以表达很多有趣的验证问题,可以在SMT满意度模块理论框架中更自然地解决。尽管有些工作解决了在SMT中生成内插值的问题,但是当前可用的技术和工具有一定的局限性,并且其性能仍未充分利用当前最新的SMT求解器的全部功能。在本文中,我们试图弥补这一差距。我们介绍了几种SMT内插生成技术,这些技术克服了上述电流发生器的局限性,并充分利用了最新的SMT技术。这些新颖的技术可以显着提高性能。当前可用的工具。我们通过对MathSAT SMT求解器中所提出技术的实施进行广泛的实验评估来支持我们的主张。

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