An energy-efficient checkpointing mechanism for out of order commit processor

摘要

In this paper, we introduce a lightweight checkpointing mechanism that permits a large number of checkpoints to be established with relatively little hardware overhead and with the ability to checkpoint the register renaming table in a compact manner. Our mechanism permits efficient checkpoint operations and Out-of-Order checkpoint release. We also propose a counterless physical registers early release mechanism. Our evaluations demonstrate that the proposed design delivers a 16.5% higher performance than an ROB based design and an average of 49% energy savings for checkpointing related operations compared to a checkpointing scheme that uses equivalent hardware resources.