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Improvement of power efficiency in switched capacitor DC-DC converter by shoot-through current elimination

机译:通过消除直通电流提高开关电容器DC-DC转换器的电源效率

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This paper presents a non overlapped rotational time interleaving scheme to eliminate shoot-through current in switched capacitor dc-dc converters. In addition to the improvement of power efficiency this scheme also reduces the output voltage ripple. In the integrated converter, current regulation control is incorporated with the basic switched capacitor converter to get the output voltage at a pre-specified level. The proposed converter has been designed in 0.18μm CMOS process with a total flying capacitance of 330pF and load capacitance of 50pF. The capacitors are chosen such that on-chip implementation is possible. The basic switched capacitor converter provides 3.3V to 1.45V conversion and achieves power efficiency of 80.7% and output voltage ripple of 5.7mV at 10mA output current. For the same output current the integrated converter achieves a power power efficiency of 73.5% and output voltage ripple of 5mV for 1.35V output voltage.
机译:本文提出了一种非重叠的旋转时间交织方案,以消除开关电容器DC-DC转换器中的直通电流。除了提高电源效率外,该方案还减少了输出电压纹波。在集成转换器中,电流调节控制与基本开关电容器转换器结合在一起,以使输出电压达到预定水平。拟议的转换器采用0.18μmCMOS工艺设计,总悬浮电容为330pF,负载电容为50pF。选择电容器使得可以在片上实现。基本的开关电容转换器可提供3.3V至1.45V的转换,并在10mA输出电流下实现80.7%的电源效率和5.7mV的输出电压纹波。对于相同的输出电流,对于1.35V输出电压,集成转换器可实现73.5%的电源功率效率和5mV的输出电压纹波。

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