An Enhanced zero-bias column buffer -direct-injection circuit using 180nm Cmos Technology

摘要

In this work an enhanced zero-bias column buffer direct injection circuit is presented. It uses a supply voltage of 1.6 volts and a bias current of 100nA. The circuit consists an amplifier of two cascaded stages, the first stage is high gain folded cascode amplifier and the second stage is high swing common source amplifier to drive the drive the buffer to control column bus voltage at Zero[1]. Using appropriate size of transistors and DC sources the performance of the circuit is enhanced in terms of frequency, noise and stability. The Simulation is done using Cadence Virtuoso with 180nm CMOS Technology.