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Security analysis of Anti-SAT

机译:反SAT的安全性分析

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摘要

Logic encryption protects integrated circuits (ICs) against intellectual property (IP) piracy and overbuilding attacks by encrypting the IC with a key. A Boolean satisfiability (SAT) based attack breaks all existing logic encryption technique within few hours. Recently, a defense mechanism known as Anti-SAT was presented that protects against SAT attack, by rendering the SAT-attack effort exponential in terms of the number of key gates. In this paper, we highlight the vulnerabilities of Anti-SAT and propose signal probability skew (SPS) attack against Anti-SAT block. SPS attack leverages the structural traces in Anti-SAT block to identify and isolate Anti-SAT block. The attack is 100% successful on all variants of Anti-SAT block. SPS attack is scalable to large circuits, as it breaks circuits with up to 22K gates within two minutes.
机译:逻辑加密通过使用密钥加密集成电路来保护集成电路(IC)免受知识产权(IP)盗版和过度攻击。基于布尔可满足性(SAT)的攻击会在几个小时内破坏所有现有的逻辑加密技术。最近,提出了一种称为Anti-SAT的防御机制,该机制通过使SAT攻击的工作量按键门的数量呈指数变化来防御SAT攻击。在本文中,我们重点介绍了反SAT的脆弱性,并提出了针对反SAT块的信号概率偏斜(SPS)攻击。 SPS攻击利用Anti-SAT块中的结构痕迹来识别和隔离Anti-SAT块。在所有反SAT块变体上,攻击均100%成功。 SPS攻击可扩展到大型电路,因为它可在两分钟内破坏多达22K门的电路。

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