Nano-Device Laboratory, Department of Electrical Engineering and Materials Science and Engineering Program, University of California, Riverside, California 92521 USA;
Nano-Device Laboratory, Department of Electrical Engineering and Materials Science and Engineering Program, University of California, Riverside, California 92521 USA;
Center for Nanoscale Materials, Argonne National Laboratory, IL, 60439 USA;
Nano-Device Laboratory, Department of Electrical Engineering and Materials Science and Engineering Program, University of California, Riverside, California 92521 USA;
机译:自对准顶栅非晶氧化铟锌薄膜晶体管,其性能优于低温多晶硅晶体管
机译:电荷陷阱层电导率控制对使用IGZO通道和ZnO电荷陷阱层的顶栅存储薄膜晶体管的器件性能的影响
机译:非氯化溶剂对通过旋涂处理的基于二辛基苯并噻吩并苯并噻吩的顶栅有机晶体管场效应迁移率增强的影响
机译:顶级石墨烯-on-UNCOD晶体管,具有增强性能
机译:顶栅纳米晶体硅薄膜晶体管。
机译:具有纳米刻度通道层的极高性能顶栅P型Sno薄膜晶体管
机译:高质量的背面Al2O3层提高了顶栅MoS2晶体管的性能